1. "ODETTE: A Non-Scan Design-for-Test Methodology for Trojan Detection in ICs", Mainak Banga and Michael S. Hsiao, IEEE International Symposium on Hardware Oriented Security and Trust (HOST'11)[San Diego], June 2011.

2. "Design-for-Test Methodology for Non-Scan At-Speed Testing", Mainak Banga, Nikhil P. Rahagude and Michael S. Hsiao, IEEE International Conference on Design, Automation and Testing in Europe (DATE'11)[Grenoble, France], March 2011.

3. "Trusted RTL: Trojan Detection Methodology in Pre-Silicon Designs", Mainak Banga and Michael S. Hsiao, IEEE International Symposium on Hardware Oriented Security and Trust (HOST'10)[Annaheim, USA], June 2010.

4. "Kiss the Scan Goodbye: A Non-Scan Architecture for High Coverage, Low Test Data Volume and Low Test Application Time", Michael S. Hsiao and Mainak Banga, Asian Test Symposium (ATS'09)[Taichung, TAIWAN], Nov 2009.

5. "Fast Circuit Topology Based Method to Configure the Scan Chains in Illinois Scan Architecture ", Swapneel Donglikar, Mainak Banga, Maheshwar Chandrasekar and Michael S. Hsiao, International Test Conference (ITC'09) [Austin, USA], Nov 2009.

6. "VITAMIN: Voltage Inversion Technique to Ascertain Malicious Insertions in ICs", Mainak Banga and Michael S. Hsiao, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'09) [San Fransisco, USA], July 2009.

7. "A Novel Sustained Vector Technique for the Detection of Hardware Trojans", Mainak Banga and Michael S. Hsiao, International Conference on VLSI Design (VLSID'09) [New Delhi, INDIA], Jan 2009.

8. "A Region Based Approach for the Identification of Hardware Trojans", Mainak Banga and Michael S. Hsiao, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'08) [Annaheim, USA], June 2008.

9. "Guided Test Generation for Isolation and Detection of Embedded Trojans in ICs", Mainak Banga, Maheshwar Chandrasekar, Lei Fang, and Michael S. Hsiao, Proceedings of the IEEE/ACM Great Lakes Symposium on VLSI (GLSVLSI'08) [Orlando, USA], May 2008.

10. "Multimillion Gate SoC Verification: Challenges and Solutions", Mainak Banga, National Seminar on Devices, Circuits & Communication, Birla Institute of Technology, (NASDEC'06) [Mesra, INDIA], Nov 2006.

11. "Genesis and Evolution of Automated Random Testbench Methodology", Mainak Banga and Prokash Ghosh, IDC Technical Symposium, Freescale India Design Center, [New Delhi, INDIA], Dec 2005.