I came to Bradley Department of ECE, Virginia Tech in August, 2007. Now, I am a PhD candidate in the Secure Embedded Systems Group with Dr. Patrick Schaumont as my PhD advisor.

Research

• HW/SW Co-design for secure embedded systems.
• Applied cryptography.
• FPGA-based SoC design.
• Low power digital circuit design.

• Ph.D. candidate, Electrical & Computer Engineering, Virginia Tech, Fall 2007-present.
• M.S., Electronic Science and Technology(digital VLSI design), Huazhong Univ. of Sci. & Tech., Wuhan, China, Fall 2004-Spring 2007.
• B.S., Electronic Science and Technology, Huazhong Univ. of Sci. & Tech., Wuhan, China, Fall 2000-Fall 2004.

X. Guo, Z. Chen, P. Schaumont, "Energy and Performance Evaluation of an FPGA-based SoC Platform with AES and PRESENT Coprocessors", International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2008), LNCS5114, pp. 16-115, Springer Verlag, Jul. 2008.

J. Xiao, X. Zou, Z. Liu, X. Guo, "A Novel Adaptive Interpolation Algorithm for Image Resizing", International Journal of Innovative Computing, Information and Control, vol.3, no.6(A), pp. 1335-1345, 2007.

X. Guo, Z. Liu, J. Xing, W. Fan and X. Zou, "Optimized AES Crypto Design for Wireless Sensor Networks with a Balanced S-box Architecture", in Proceedings of International Conference on Informatics and Control Technologies (ICT2006), pp. 203-208, IET, 2006.

J. Xiao, X. Zou, Z. Liu, X. Guo, "Adaptive Interpolation Algorithm for Real-time Image Resizing", in Proceedings of International Conference on Innovative Computing, Information and Control (ICICIC'06), vol. 2, pp. 221-224, IEEE, 2006.