About Me


I am a Computer Security Engineer and recent graduate of the Bradley Department of Electrical and Computer Engineering at Virginia Tech. I am currently working as a Security Researcher at Intel Corporation, where I am responsible for providing security assurance for Intel products and services targeting mobile phones.

I received my Master of Science in Computer Engineering in December 2012. My master's research is described in my thesis entitled "Design Methods for Cryptanalysis." I completed this research working with Dr. Patrick Schaumont in the Secure Embedded Systems Lab (SES) in the area of secure embedded design. SES is part of the Center for Embedded Systems for Critical Applications (CESCA) at Virginia Tech.

I was accepted into the ECE department accelerated Undergraduate/Graduate Degree program for top Virginia Tech students and received my Bachelors degree magna cum laude in Computer Engineering from Virginia Tech in December 2011. During my undergraduate study, I held three internships, which gave me experience in software engineering, testing, and verification.

News

Jan 14, 2013 Started full-time position as a Security Researcher at Intel in Hillsboro Oregon
Dec 21, 2012 Received Master of Science in Computer Engineering from Virginia Tech.
Dec 14, 2012 Attended the Workshop on Redefining and Integrating Security Engineering at ASE/IEEE International Conference on Cyber Security 12 (RISE'12) in Washington, DC. I presented the paper "A Modular Testing Environment for Implementation Attacks" [PDF] [Slides]
Dec 7, 2012 Final electronic thesis (ETD) submission "Design Methods for Cryptanalysis" [PDF] approved by the Virginia Tech Graduate School.
Nov 29, 2012 Successfully defended my thesis "Design Methods for Cryptanalysis" [Slides]
Nov 10, 2012 "A Modular Testing Environment for Implementation Attacks" [PDF] accepted for presentation at the Workshop on Redefining and Integrating Security Engineering at ASE/IEEE International Conference on Cyber Security 12 (RISE'12) December 14-16, 2012 in Washington, DC
Sep 17, 2012 "A Hardware-Accelerated ECDLP with High-performance Modular Multiplication" [PDF] accepted for publication in International Journal of Reconfigurable Computing special issue on Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2011)
Mar 17-18, 2012 Attended Special-Purpose Hardware for Attacking Cryptographic Systems (SHARCS 2012) workshop in Washington DC. I gave a presentation on my paper entitled "A Flexible Hardware ECDLP Engine in Bluespec" [PDF] [Slides]
Mar 13-14, 2012 Attended 2-Day Workshop on Differential Power Analysis (DPA) and Suite B in Reston VA hosted by Cryptography Research, Inc. The workshop gives an introduction to timing and power analysis attacks and countermeasures using the DPA Workstation™.
Feb 19, 2012 "A Flexible Hardware ECDLP Engine in Bluespec" [PDF] accepted for presentation at the Special-Purpose Hardware for Attacking Cryptographic Systems (SHARCS 2012) workshop March 17-18, 2012 in Washington, DC
Jan 23, 2012 Invited to submit extended version of "An Integrated Prime-field ECDLP Hardware Accelerator with High-performance Modular Arithmetic Units" for publication in a special issue of the International Journal of Reconfigurable Computing (IJRC) with the title "Selected Papers from ReConfig 2011"
Dec 15, 2011 Received Bachelor of Science in Computer Engineering magna cum laude from Virginia Tech
Sep 27, 2011 "An Integrated Prime-field ECDLP Hardware Accelerator with High-performance Modular Arithmetic Units" [PDF] accepted for oral presentation at ReConFig 2011.

Lyndon Judge

Security Researcher
Security Center of Excellence
Intel Corporation
Hillsboro, Oregon, USA

lvjudge1@gmail.com
+1 (703) 474-8130

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